ATPG (Automatic Test Pattern Generation) is used during the testing of integrated circuits. In particular, ATPG provides an input or test sequence which when applied to the circuit under test allows a distinction to be made between the correct circuit behavior and faulty circuit behavior. ATPG is generally used to test integrated circuits once they have been manufactured. ATPG may provide information which can be used to determine the cause of the faulty circuit behavior.
A stuck at fault model is used by ATPG tools in order to mimic a manufacturing defect within the integrated circuit. In this model, individual signals or pins are assumed to be stuck at a particular logic level, for example logic 1 or logic 0. This model assumes that one of the signal lines or pins is stuck at a particular logic value regardless of what inputs are provided to the circuit.